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Overview
Infineon offers a comprehensive portfolio of HYPERRAM?/Octal xSPI RAM memories with densities ranging from 64 Mb to 512 Mb. With its unique blend of high bandwidth and low pin-count, HYPERRAM? is ideal for a wide range of industrial and automotive applications that require additional RAM for data-intensive operations. These energy efficient pSRAMs are also the ideal expansion memory choice for battery-operated consumer and wearable devices.
Key Features
- Small-form-factor of 6 x 8 mm
- Lower pin-count with xSPI/HYPERBUS?
- Energy-efficient with hybrid sleep
- High throughput up to 800 Mbps
- HYPERFLASH? plus HYPERRAM? as MCP
- Scalable densities up to 512 Mb
- AEC-Q100 devices with up to 125¡ãC
- Wide eco-system support
Applications
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About
HYPERRAM? is a high-speed CMOS, self-refresh DRAM, with a HYPERBUS? interface. Its memory array is internally structured like DRAM, but externally acts like SRAM.
The DRAM array requires a periodic refresh to maintain data integrity. HYPERRAM? internally manages the refresh operations on the DRAM array when the memory is not being actively read or written by a host. Since the host is not required to manage any refresh operations, the DRAM array appears to the host as static cells that retain data without refresh. Hence, HYPERRAM? is described as pseudostatic RAM (pSRAM).
These low-power, high-performance, and low pin-count pSRAMs are suitable for applications requiring additional RAM for buffering data, audio, images, video, or as a scratchpad for math and data-intensive operations.
- Density: 64 Mb, 128 Mb, 256 Mb, 512 Mb
- Interface: HYPERBUS? (x8), Octal xSPI (x8), and HYPERBUS? Extended I/O (x16)
- Key features:
- Small-form-factor - FBGA package ensures a small PCB footprint
- Low pin-count - simplifies design and reduces system cost
- Low power - hybrid sleep mode and partial-array-refresh for energy efficiency
- High throughput - high read/write bandwidth to maximize system performance
HYPERRAM? 2.0 is the second generation of low pin-count pSRAM from Infineon that supports throughputs of up to 400 MBps. HYPERRAM? 2.0 products are available from 64 Mb up to 512 Mb. HYPERRAM? 2.0 devices are available with Octal xSPI and HYPERBUS? interface.?
Our third-generation pSRAM products - HYPERRAM? 3.0, doubles the throughput to 800 MBps using a new, 16-bit, extended version of the HYPERBUS? interface. 256 Mb HYPERRAM? 3.0 products are now available in production.
These pSRAM products are industrial/automotive-qualified and support JEDEC-compliant Octal xSPI and HYPERBUS? interface.
HYPERBUS? is a low signal count DDR interface that achieves high-speed read and write throughput. It utilizes a high-speed 8-bit DDR interface for both address and data along with a differential clock, a read/write latch signal, and a chip select.
HYPERBUS? can also support external NOR flash and RAM on the same bus and works with any microcontroller with a HYPERBUS?-compatible peripheral interface. This requires only 13 pins for data transactions (12-pin HYPERBUS? + 1 additional chip select for the second memory device).
HYPERRAM? products achieve a far higher throughput per pin compared to competing technologies such as traditional ADMUX pSRAMs and SDR DRAMs which are based on a parallel interface. The built-in self-refresh circuitry and low-power features such as partial-array-refresh and hybrid-sleep enable lower power consumption making HYPERRAM? apt for power-constrained applications such as wearables and IoT devices.
HYPERRAM?¡¯s high throughput, low pin-count, smaller footprint, and energy efficiency makes it an ideal expansion memory choice for a variety of automotive, industrial, consumer, and communication applications.
- Automotive instrument clusters
HYPERRAM? memories provide density-scalability to meet the requirements of different instrument cluster systems. These memory devices provide an ideal solution for real-time graphics and high-speed access. The low-pin count interface also reduces design complexity and PCB size to save on design costs.
- Industrial machine vision cameras
FPGA used in Industrial applications have limited internal RAM resources and often require low pin-count external memory for image processing. HYPERRAM? with its lower pin-count and higher density makes it an ideal expansion memory solution.
HYPERRAM? is a high-speed CMOS, self-refresh DRAM, with a HYPERBUS? interface. Its memory array is internally structured like DRAM, but externally acts like SRAM.
The DRAM array requires a periodic refresh to maintain data integrity. HYPERRAM? internally manages the refresh operations on the DRAM array when the memory is not being actively read or written by a host. Since the host is not required to manage any refresh operations, the DRAM array appears to the host as static cells that retain data without refresh. Hence, HYPERRAM? is described as pseudostatic RAM (pSRAM).
These low-power, high-performance, and low pin-count pSRAMs are suitable for applications requiring additional RAM for buffering data, audio, images, video, or as a scratchpad for math and data-intensive operations.
- Density: 64 Mb, 128 Mb, 256 Mb, 512 Mb
- Interface: HYPERBUS? (x8), Octal xSPI (x8), and HYPERBUS? Extended I/O (x16)
- Key features:
- Small-form-factor - FBGA package ensures a small PCB footprint
- Low pin-count - simplifies design and reduces system cost
- Low power - hybrid sleep mode and partial-array-refresh for energy efficiency
- High throughput - high read/write bandwidth to maximize system performance
HYPERRAM? 2.0 is the second generation of low pin-count pSRAM from Infineon that supports throughputs of up to 400 MBps. HYPERRAM? 2.0 products are available from 64 Mb up to 512 Mb. HYPERRAM? 2.0 devices are available with Octal xSPI and HYPERBUS? interface.?
Our third-generation pSRAM products - HYPERRAM? 3.0, doubles the throughput to 800 MBps using a new, 16-bit, extended version of the HYPERBUS? interface. 256 Mb HYPERRAM? 3.0 products are now available in production.
These pSRAM products are industrial/automotive-qualified and support JEDEC-compliant Octal xSPI and HYPERBUS? interface.
HYPERBUS? is a low signal count DDR interface that achieves high-speed read and write throughput. It utilizes a high-speed 8-bit DDR interface for both address and data along with a differential clock, a read/write latch signal, and a chip select.
HYPERBUS? can also support external NOR flash and RAM on the same bus and works with any microcontroller with a HYPERBUS?-compatible peripheral interface. This requires only 13 pins for data transactions (12-pin HYPERBUS? + 1 additional chip select for the second memory device).
HYPERRAM? products achieve a far higher throughput per pin compared to competing technologies such as traditional ADMUX pSRAMs and SDR DRAMs which are based on a parallel interface. The built-in self-refresh circuitry and low-power features such as partial-array-refresh and hybrid-sleep enable lower power consumption making HYPERRAM? apt for power-constrained applications such as wearables and IoT devices.
HYPERRAM?¡¯s high throughput, low pin-count, smaller footprint, and energy efficiency makes it an ideal expansion memory choice for a variety of automotive, industrial, consumer, and communication applications.
- Automotive instrument clusters
HYPERRAM? memories provide density-scalability to meet the requirements of different instrument cluster systems. These memory devices provide an ideal solution for real-time graphics and high-speed access. The low-pin count interface also reduces design complexity and PCB size to save on design costs.
- Industrial machine vision cameras
FPGA used in Industrial applications have limited internal RAM resources and often require low pin-count external memory for image processing. HYPERRAM? with its lower pin-count and higher density makes it an ideal expansion memory solution.